Microvia PCB Supplier
for High-Density HDI Applications

We use high pulse UV and CO₂ laser systems for via formation, achieving hole diameters between 100 and 150 µm. 

Beam control features ±2% energy stability, spot size shaping down to 10 µm, and a programmable drill depth stop based on material thickness. 

Via positional accuracy is maintained within ±50 µm through fiducial alignment and real-time beam tracking. These systems allow clean microvia formation across PTFE, FR4, and high Tg cores

Our PCB assemblies are built according to IPC-A-610 Classes 1 through 3 requirements, ensuring solder-joint integrity, component alignment, cleanliness, and overall workmanship meet the stringent criteria for consumer, commercial, and high-reliability applications.

Builds can scale to 36 layers, using low-flow prepreg, vacuum lamination, and step drilling for hybrid via structures.

Stacked microvias are drilled and copper-filled sequentially with each lamination stage, using resin coated foil (RCF) and vacuum copper plating to maintain via verticality. 

Staggered vias offset by 0.2 to 0.3 mm reduce cumulative expansion and increase reliability. We maintain aspect ratios of ≤0.75:1 for stacked vias and control interconnect skew with layer-to-layer alignment of ±50 µm across the full HDI stack.

Microvias are filled using electrolytic copper plating at current densities of 20 to 30 ASF, forming via wall thicknesses between 20 and 25 µm. 

After plating, vias are planarized using chemical-mechanical polishing (CMP) to maintain pad coplanarity within ±15 µm, supporting stable solder joint formation under BGA packages. 

The via fill factor is controlled to ≥95%, eliminating internal voids, improving thermal transfer and preventing solder collapse during reflow.

For via-in-pad builds, filled vias are capped and planarized to a surface tolerance of ±10 μm before the application of the solder mask. 

These structures are used with fine-pitch BGA and CSP devices, down to 0.4 mm pitch, with no solder wicking or collapse. 

VIPPO structures are verified by X-ray, microsectioning, and SMT trial builds to ensure flatness and joint stability during the PCB assembly process.

Our microvia PCBs are fabricated on FR4, PTFE, LCP, Isola 370HR, Rogers 4003C, and halogen free systems.

Each laminate is selected based on laser ablation profile, glass transition temperature (Tg), Df/Dk targets, and stack up thickness compatibility.

For stacked builds, resin content is adjusted to prevent flow-out and maintain dielectric spacing across inner layers and blind spans.

Each panel undergoes AOI via ring check, pad alignment and annular ring clearance validation. 

X-ray inspection ensures internal via fill and concentricity, with inspection resolutions down to 10 µm voxel size. 

Microsection analysis confirms plating thickness, resin voids, and via wall adhesion. All buried and blind vias are tested in accordance with IPC acceptance limits.

HDI stack ups are modeled with field solver simulations and manufactured with ±5 Ω tolerance on 50 Ω single-ended and 90 Ω differential traces. 

Each microvia layer’s dielectric constant and copper thickness are carefully controlled. 

We verify impedance by TDR sampling across stacked via paths on impedance coupons placed on every panel.